SSE3
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SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in 2004 with the Prescott revision of their Pentium 4 and Celeron D CPUs. In April 2005, AMD introduced a subset of SSE3 in revision E (Venice and San Diego) of their Athlon 64 CPUs. The earlier SIMD instruction sets on the x86 platform, from oldest to newest, are MMX, 3DNow! (developed by AMD, no longer supported on newer CPUs), SSE, and SSE2.
Wikidata facts
- Instance of
- instruction set architecture
- Part of
- Intel 64
- Based on
- Streaming SIMD Extensions
Show 2 more facts
- different from
- Supplemental Streaming SIMD Extensions 3
- start time
- 2004-00-00
Sources (1)
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