クロックゲーティング
Sign in to savetechnique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states)
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Within Vinony's link graph, クロックゲーティング is referenced by 219 other articles, and connects out to CPU cache, hazard and central processing unit.
It is catalogued under topics including Clock signal and Electronic design automation.
Its subject is documented across 11 Wikipedia language editions.
Wikidata facts
- Instance of
- electronic circuit
- Image
- Gated clk1.png
Show 1 more fact
- Commons category
- Clock gating
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Connections
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